As polishing pads for planarization (for example, Chemical Mechanical Polishing; CMP) of semiconductor wafers as substrates for making integrated circuits, composite materials of velour-like or suede-like textile and resin, or relatively soft sheets with high deformation upon compression prepared by impregnating a thermoplastic polyurethane resin into a non-woven fabric, and setting the resin in wet state, have been commonly used.
In recent years, there have been growing demands for semiconductor wafer price reduction, in addition to quality improvements for further planarization and the like in line with higher integration and multilevel interconnection. Accordingly, polishing pads are required to have higher functions such as the ability to achieve more-than-conventional planarization, to permit long use, and the like.
Although conventional polishing pads of the relatively soft non-woven fabric type have good contact with wafers and ensure good retention of polishing slurry used during polishing, their performance for planarization of the polished surface is insufficient because of the softness thereof. Moreover, polishing slurry and polishing dust produced during polishing can clog air spaces in the non-woven fabric, which is likely to cause flaws on the wafer surface. In case of clogging with polishing slurry or polishing dust, they are difficult to remove by cleaning because they have invaded deeply in the air spaces of the non-woven fabric, resulting in another problem of a shorter service life of the polishing pad.
Meanwhile, polishing pads made of polymeric foam are also available, and are commonly used for applications in need of even higher levels of planarization because they are more rigid than polishing pads of the non-woven fabric type. Additionally, polishing pads made of a polymeric foam having an independent pore structure permit relatively easy cleaning and can endure long use because polishing slurry and polishing dust do not invade deeply in their air spaces as with polishing pads of the non-woven fabric type. As such polymeric foam, foamed polyurethane is commonly used because of its excellent wear resistance.
A polishing pad made of foamed polyurethane is usually produced by grinding or slicing foamed polyurethane as appropriate. Conventionally, foamed polyurethane for polishing pads has been produced by cast foam setting using a two-pack curable polyurethane (see Patent Documents 1 to 4 and the like). However, this method encounters difficulty in uniformizing the reaction and foaming and, in addition, is subject to limitations on increasing the hardness of the foamed polyurethane obtained. Additionally, conventional polishing pads made of foamed polyurethane can sometimes undergo fluctuation in the polishing characteristics thereof, such as the flatness of the polished surface and planarization efficiency; this is attributable in part to variation in the foam structure in the starting material foamed polyurethane.
To increase planarization efficiency, an even harder polishing pad is wanted (see Non-patent Document 1); on the other hand, particularly in polishing a metal layer, such as a copper layer, on a semiconductor substrate, there is an apparently contradictory need to lower the hardness so as to reduce scratches on the wafer surface. Planarization efficiency is influenced by the hardness of the entire polishing pad, whereas the onset of scratches on the wafer surface is considered to be influenced by the localized hardness on the polishing pad surface. For this reason, it is preferable that the elastic modulus of the polishing pad at relatively low temperature be increased to ensure sufficient planarization efficiency, and that if the temperature rises due to excess friction of the polishing pad with the wafer surface, the elastic modulus of the polishing pad decline rapidly so as to prevent the occurrence of scratches on the wafer surface. However, in the case of the above-described two-pack curable polyurethane, it is difficult to rapidly change the elastic modulus by a rise in temperature; as a result, it has been difficult to reconcile an improvement of planarization efficiency and the suppression of scratches.
Meanwhile, a polishing pad consisting of a foamed polyurethane other than two-pack curable polyurethane is also available; for example, a polishing pad consisting of a polyurethane foam wherein the density is 0.5 to 1.0 g/cm3, the pore size is 5 to 20 μm, and the hardness (JIS-C hardness) is 90 or more, the polyurethane foam consisting of a thermoplastic polyurethane wherein the isocyanate group-derived nitrogen atom content ratio is 6% by weight or more, and the dynamic viscoelastic modulus at 50° C. is 5×109 dyn/cm2 or more, obtained by reacting a high-molecular diol, an organic diisocyanate and a chain elongating agent, has been proposed (see Patent Document 5). However, when using a polishing pad consisting of a thermoplastic polyurethane wherein the isocyanate-derived nitrogen atom content ratio is 6% by weight or more, it has been feared that many scratches occur on the wafer surface during wafer polishing because of excess hardness.    Patent Document 1: JP-A-2000-178374    Patent Document 2: JP-A-2000-248034    Patent Document 3: JP-A-2001-89548    Patent Document 4: JP-A-11-322878    Patent Document 5: JP-A-2002-371154    Non-patent Document 1: Masahiro Kashiwagi et al., “Science of CMP”, Science Forum K.K., published on Aug. 20, 1997, p. 113-119